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 ESDR0502B Transient Voltage Suppressor
ESD Protection Diodes with Ultra-Low Capacitance
The ESDR0502B is designed to protect voltage sensitive components from damage due to ESD in applications that require ultra low capacitance to preserve signal integrity. Excellent clamping capability, low leakage and fast response time are combined with an ultra low diode capacitance of 0.5 pF to provide best in class protection from IC damage due to ESD. The small SC-75 package is ideal for designs where board space is at a premium. The ESDR0502B can be used to protect two uni-directional lines or one bi-directional line. When used to protect one bi-directional line, the effective capacitance is 0.25 pF. Because of its low capacitance, it is well suited for protecting high frequency signal lines such as USB2.0 high speed and antenna line applications.
Specification Features: http://onsemi.com
PIN 1. CATHODE 2. CATHODE 3. ANODE
1 2
3
MARKING DIAGRAM
3 1 2 SC-75 CASE 463 STYLE 4 1 AD M G = Device Code = Date Code* = Pb-Free Package
* Low Capacitance 0.5 pF Typical * Low Clamping Voltage * Small Body Outline Dimensions: * * * * * *
AD M G G
0.063" x 0.063" (1.60 mm x 1.60 mm) Low Body Height: 0.031 (0.8 mm) Stand-off Voltage: 5 V Low Leakage Response Time is Typically < 1.0 ns IEC61000-4-2 Level 4 ESD Protection This is a Pb-Free Device
(Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location.
Mechanical Characteristics: CASE: Void-free, transfer-molded, thermosetting plastic
Epoxy Meets UL 94 V-0 LEAD FINISH: 100% Matte Sn (Tin) MOUNTING POSITION: Any
QUALIFIED MAX REFLOW TEMPERATURE: 260C
ORDERING INFORMATION
Device ESDR0502BT1G Package SC-75 (Pb-Free) Shipping 3000/Tape & Reel
Device Meets MSL 1 Requirements
MAXIMUM RATINGS
Rating IEC 61000-4-2 (ESD) Peak Surge Power Peak Surge Current Contact (8 x 20 ms) (8 x 20 ms) Ppk Ipp PD Tstg TJ TL Symbol Value 8.0 20 2.0 150 -55 to +150 -55 to +150 260 Unit kV W A mW C C C
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
DEVICE MARKING INFORMATION
See specific marking information in the device marking column of the Electrical Characteristics tables starting on page 2 of this data sheet.
Total Power Dissipation on FR-5 Board (Note 1) @ TA = 25C Storage Temperature Range Junction Temperature Range Lead Solder Temperature - Maximum (10 Second Duration)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. FR-5 = 1.0 x 0.75 x 0.62 in.
See Application Note AND8308/D for further description of survivability specs.
(c) Semiconductor Components Industries, LLC, 2010
June, 2010 - Rev. 0
1
Publication Order Number: ESDR0502B/D
ESDR0502B
ELECTRICAL CHARACTERISTICS
(TA = 25C unless otherwise noted) Symbol IPP VC VRWM IR VBR IT IF VF Ppk C Parameter Maximum Reverse Peak Pulse Current Clamping Voltage @ IPP Working Peak Reverse Voltage Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT Test Current Forward Current Forward Voltage @ IF Peak Power Dissipation Capacitance @ VR = 0 and f = 1.0 MHz IPP VC VBR VRWM IR VF IT V IF I
Uni-Directional TVS
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted, VF = 1.1 V Max. @ IF = 10 mA for all types)
VRWM (V) IR (mA) @ VRWM VBR (V) @ IT (Note 2) C (pF), uni-directional (Note 3) C (pF), bi-directional (Note 4) VC (V) @ IPP = 1 A (Note 5)
IT
VC Per IEC61000- 4-2 (Note 6) Figures 1 and 2
Device ESDR0502B 2. 3. 4. 5. 6.
Device Marking AD
Max 5.0
Max 1.0
Min 5.8
mA 1.0
Typ 0.5
Max 0.9
Typ 0.25
Max 0.45
Max 15
VBR is measured with a pulse test current IT at an ambient temperature of 25C. Uni-directional capacitance at f = 1 MHz, VR = 0 V, TA = 25C (pin1 to pin 3; pin 2 to pin 3). Bi-directional capacitance at f = 1 MHz, VR = 0 V, TA = 25C (pin1 to pin 2). Surge current waveform per Figure 5. Typical waveform. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
Figure 1. ESD Clamping Voltage Screenshot Positive 8 kV contact per IEC 61000-4-2
Figure 2. ESD Clamping Voltage Screenshot Negative 8 kV contact per IEC 61000-4-2
http://onsemi.com
2
ESDR0502B
IEC 61000-4-2 Spec.
Test Voltage (kV) 2 4 6 8 First Peak Current (A) 7.5 15 22.5 30 Current at 30 ns (A) 4 8 12 16 Current at 60 ns (A) 2 4 6 8 I @ 60 ns 10% tP = 0.7 ns to 1 ns I @ 30 ns IEC61000-4-2 Waveform Ipeak 100% 90%
Level 1 2 3 4
Figure 3. IEC61000-4-2 Spec
ESD Gun
TVS
Oscilloscope
50 W Cable
50 W
Figure 4. Diagram of ESD Test Setup The following is taken from Application Note AND8308/D - Interpretation of Datasheet Parameters for ESD Devices. ESD Voltage Clamping
For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000-4-2 waveform. Since the IEC61000-4-2 was written as a pass/fail spec for larger
100 % OF PEAK PULSE CURRENT 90 80 70 60 50 40 30 20 10 0 0 20 tP tr
systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to AND8307/D.
PEAK VALUE IRSM @ 8 ms PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8 ms HALF VALUE IRSM/2 @ 20 ms
40 t, TIME (ms)
60
80
Figure 5. 8 X 20 ms Pulse Waveform
http://onsemi.com
3
ESDR0502B
PACKAGE DIMENSIONS
SC-75/SOT-416 CASE 463-01 ISSUE F
-E-
2 3 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER.
e
1
-D-
b 3 PL 0.20 (0.008)
M
D
HE
0.20 (0.008) E
DIM A A1 b C D E e L HE
MILLIMETERS MIN NOM MAX 0.70 0.80 0.90 0.00 0.05 0.10 0.15 0.20 0.30 0.10 0.15 0.25 1.55 1.60 1.65 0.70 0.80 0.90 1.00 BSC 0.10 0.15 0.20 1.50 1.60 1.70
INCHES NOM MAX 0.031 0.035 0.002 0.004 0.008 0.012 0.006 0.010 0.063 0.067 0.031 0.035 0.04 BSC 0.004 0.006 0.008 0.061 0.063 0.065 MIN 0.027 0.000 0.006 0.004 0.059 0.027
C
A L A1
STYLE 4: PIN 1. CATHODE 2. CATHODE 3. ANODE
SOLDERING FOOTPRINT*
0.356 0.014
1.803 0.071
0.787 0.031
0.508 0.020
1.000 0.039
SCALE 10:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
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4
ESDR0502B/D


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